Enabling Applications To Exploit Smartnics And Fpgas

June 4, 2026
Media Summary: In this video from the 2019 OpenFabrics Workshop in Austin, Sean Hefty and Venkata Krishnan from Intel present: Improving Performance and Reducing CPU Utilization For Server Based This video will give you more detail of DG's TOE100G-IP Core and Silicom's PacketMover framework and the

Enabling Applications To Exploit Smartnics And Fpgas - Detailed Analysis & Overview

In this video from the 2019 OpenFabrics Workshop in Austin, Sean Hefty and Venkata Krishnan from Intel present: Improving Performance and Reducing CPU Utilization For Server Based This video will give you more detail of DG's TOE100G-IP Core and Silicom's PacketMover framework and the Ethernity's approach to network processing offload on A panel discussion with Hemant Agrawal, Alejandro Lucero, Andrey Chilikin, Brian Johnson, Nishant Lodha, Declan Doherty and ... In this demo we show how the heavy dependency of the Netronome Agilio-CX-2x10G cards on caching mechanisms can be ...

Patrick Walsh April 17, 2026 Adding LLMs to your product is deceptively easy: drop in a chat UI, add RAG, connect tools, and call ...

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Enabling Applications to Exploit SmartNICs and FPGAs
FPGA-Based SmartNICs
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Using FPGA-Based SmartNICs for Packet Processing at 400 Gbps+
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SMARTNIC, FPGA, IPSEC Panel discussion
Long version: FPGA SmartNICs Providing High Speed Lossless Packet Capture for Trading Analytics

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Enabling Applications to Exploit SmartNICs and FPGAs

Enabling Applications to Exploit SmartNICs and FPGAs

In this video from the 2019 OpenFabrics Workshop in Austin, Sean Hefty and Venkata Krishnan from Intel present:

FPGA-Based SmartNICs

FPGA-Based SmartNICs

Improving Performance and Reducing CPU Utilization For Server Based

USENIX ATC '22 - FpgaNIC: An FPGA-based Versatile 100Gb SmartNIC for GPUs

USENIX ATC '22 - FpgaNIC: An FPGA-based Versatile 100Gb SmartNIC for GPUs

USENIX ATC '22 - FpgaNIC: An

Modular SmartNIC Design Using FPGAs | Achronix

Modular SmartNIC Design Using FPGAs | Achronix

Discover the power of

FPGA-based SmartNIC for high-performance TCP/IP application

FPGA-based SmartNIC for high-performance TCP/IP application

This video will give you more detail of DG's TOE100G-IP Core and Silicom's PacketMover framework and the

Using FPGA-Based SmartNICs for Packet Processing at 400 Gbps+

Using FPGA-Based SmartNICs for Packet Processing at 400 Gbps+

Presentation from

SmartNIC: FPGA Innovation in OCS Servers for Microsoft Azure (LL20D - Server)

SmartNIC: FPGA Innovation in OCS Servers for Microsoft Azure (LL20D - Server)

Microsoft

Short version: FPGA SmartNICs Providing High Speed Lossless Packet Capture for Trading Analytics

Short version: FPGA SmartNICs Providing High Speed Lossless Packet Capture for Trading Analytics

Learn how

Ethernity's SmartNIC Explained

Ethernity's SmartNIC Explained

Ethernity's approach to network processing offload on

Compact 200G FPGA SmartNIC

Compact 200G FPGA SmartNIC

Introducing the Napatech Compact 200G

SMARTNIC, FPGA, IPSEC Panel discussion

SMARTNIC, FPGA, IPSEC Panel discussion

A panel discussion with Hemant Agrawal, Alejandro Lucero, Andrey Chilikin, Brian Johnson, Nishant Lodha, Declan Doherty and ...

Long version: FPGA SmartNICs Providing High Speed Lossless Packet Capture for Trading Analytics

Long version: FPGA SmartNICs Providing High Speed Lossless Packet Capture for Trading Analytics

Learn how

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NSDI '26 - FENIX: Enabling In-Network DNN Inference with FPGA-Enhanced Programmable Switches

FENIX:

Compromising P4-enabled SmartNICs in less than a minute!

Compromising P4-enabled SmartNICs in less than a minute!

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