Media Summary: In this talk, Prof. Zhou presented the most recent This module presents implementation issues in Yang Xie and Ankur Srivastava, CHES 2016. See

Advances In Logic Locking For Hardware Ip Protection - Detailed Analysis & Overview

In this talk, Prof. Zhou presented the most recent This module presents implementation issues in Yang Xie and Ankur Srivastava, CHES 2016. See The ever-increasing cost and complexity of cutting-edge manufacturing and test processes have migrated the semiconductor ... ISCAS 2020: Reducing Logic Locking Key Leakage Through the Scan Chain​ How to mitigate oracle-based attacks? What security metrics to focus on? Security trade-offs?

The rapid globalization of the semiconductor industry has introduced security and privacy issues related to This module introduces a design-for-trust technique, This module explains whether test principles/techniques can be adopted for design-for-trust. In particular, it highlights the ... Paper by Bicky Shakya, Xiaolin Xu, Mark Tehranipoor, Domenic Forte presented at CHES 2020 See ... So my presentation is about provably skewed The challenge isn't just fixing vulnerabilities. It's knowing these devices exist in the first place. At Black Hat Asia, we explored a ...

This module describes a powerful attack, SAT attack, developed in 2015 by researchers from Princeton (HOST 2015). This attack ...

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Advances in Logic Locking for Hardware IP Protection
Module 7 - Early Effort in Logic Locking
Logic Locking via Stripped Functionality
Mitigating SAT Attack on Logic Locking
LL-ATPG: Logic-Locking Aware Test Using Valet Keys in an Untrusted Environment
ISCAS 2020: Reducing Logic Locking Key Leakage Through the Scan Chain​
Paper Review: SAIL: Analyzing structural artifacts of logic locking using machine learning
Module 11: Logic locking via Stripping Functionality
USENIX Security '21 - Does logic locking work with EDA tools?
Logic Locking Competition: HeLLO CTF22(final report)
Module 2 - Logic Locking Fundamentals
IP core Security : IPLock Logic Protection Demo
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Advances in Logic Locking for Hardware IP Protection

Advances in Logic Locking for Hardware IP Protection

In this talk, Prof. Zhou presented the most recent

Module 7 - Early Effort in Logic Locking

Module 7 - Early Effort in Logic Locking

This module presents implementation issues in

Logic Locking via Stripped Functionality

Logic Locking via Stripped Functionality

Logic Locking via Stripped Functionality

Mitigating SAT Attack on Logic Locking

Mitigating SAT Attack on Logic Locking

Yang Xie and Ankur Srivastava, CHES 2016. See http://www.iacr.org/cryptodb/data/paper.php?pubkey=27831.

LL-ATPG: Logic-Locking Aware Test Using Valet Keys in an Untrusted Environment

LL-ATPG: Logic-Locking Aware Test Using Valet Keys in an Untrusted Environment

The ever-increasing cost and complexity of cutting-edge manufacturing and test processes have migrated the semiconductor ...

ISCAS 2020: Reducing Logic Locking Key Leakage Through the Scan Chain​

ISCAS 2020: Reducing Logic Locking Key Leakage Through the Scan Chain​

ISCAS 2020: Reducing Logic Locking Key Leakage Through the Scan Chain​

Paper Review: SAIL: Analyzing structural artifacts of logic locking using machine learning

Paper Review: SAIL: Analyzing structural artifacts of logic locking using machine learning

To address these security tools

Module 11: Logic locking via Stripping Functionality

Module 11: Logic locking via Stripping Functionality

How to mitigate oracle-based attacks? What security metrics to focus on? Security trade-offs?

USENIX Security '21 - Does logic locking work with EDA tools?

USENIX Security '21 - Does logic locking work with EDA tools?

USENIX Security '21 - Does

Logic Locking Competition: HeLLO CTF22(final report)

Logic Locking Competition: HeLLO CTF22(final report)

The rapid globalization of the semiconductor industry has introduced security and privacy issues related to

Module 2 - Logic Locking Fundamentals

Module 2 - Logic Locking Fundamentals

This module introduces a design-for-trust technique,

IP core Security : IPLock Logic Protection Demo

IP core Security : IPLock Logic Protection Demo

IP Lock

Module 6 - Leveraging Test Principles for Logic Locking

Module 6 - Leveraging Test Principles for Logic Locking

This module explains whether test principles/techniques can be adopted for design-for-trust. In particular, it highlights the ...

CAS-Lock: A Security-Corruptibility Trade-off Resilient Logic Locking Scheme

CAS-Lock: A Security-Corruptibility Trade-off Resilient Logic Locking Scheme

Paper by Bicky Shakya, Xiaolin Xu, Mark Tehranipoor, Domenic Forte presented at CHES 2020 See ...

MEST Webinar: Logic Locking Research (2008 - Present)

MEST Webinar: Logic Locking Research (2008 - Present)

This is a webinar on

11 1 17 ACM CCS   Muhammad Yasin   Provably Secure Logic Locking

11 1 17 ACM CCS Muhammad Yasin Provably Secure Logic Locking

So my presentation is about provably skewed

Security Risks in Forgotten Devices and Impacts on Critical Systems (Serial-to-IP Converters)

Security Risks in Forgotten Devices and Impacts on Critical Systems (Serial-to-IP Converters)

The challenge isn't just fixing vulnerabilities. It's knowing these devices exist in the first place. At Black Hat Asia, we explored a ...

Lec 38: Attacks on RTL Logic locking

Lec 38: Attacks on RTL Logic locking

C-Based VLSI Design Playlist Link: https://www.youtube.com/playlist?list=PLwdnzlV3ogoXIsX4JXpjM7Qj-apemmmOw Prof.

Module 9 - SAT Attack on Logic Locking

Module 9 - SAT Attack on Logic Locking

This module describes a powerful attack, SAT attack, developed in 2015 by researchers from Princeton (HOST 2015). This attack ...

Dynamically Obfuscated Scan Chain

Dynamically Obfuscated Scan Chain

Logic locking